DEVELOPMENT
OF UNIVERSAL aSYNCHRONOUS rECEIVER / tRANSMITTER INTERFACE USING VERILOG HDL
MUHAMMAD FAHMI BIN SHAMSUDIN
51211210173
Report submitted to Fulfill the
Partial Requirements
For the Bachelor of Engineering Technology
(Hons) in Electronics
University of Kuala Lumpur
DECLARATION
I
declare that this report entitle DEVELOPMENT
OF UNIVERSAL ASYNCHRONOUS RECEIVER / TRANSMITTER INTERFACE USING VERILOG HDL is
the results of my own research excepts as cited in the references. The report
has not been accepted for any degree and is not concurrently submitted in
candidature of any other degree.
Signature : ……………………………………………
Name :
MUHAMMAD FAHMI BIN SHAMSUDIN
Date :
JANUARY 8 , 2014
APPROVAL
We
have examined this report and verify that it meets the program and University
requirements for the Bachelor of Engineering Technology (Hons) in Electronics.
Date: 15 January
2014 Signature :……………………………………
Supervisor’s Name: SIR SUHAIMI
BAHISHAM BIN YUSOF
Official Stamp
ACKNOWLEDGEMENT
First of all I would like to thank to Allah for giving me
all the courage and patient towards completing this project. I would like to
acknowledge and extend my heartfelt gratitude to my Project Advisor, Sir
Suhaimi Bahisham bin Yusof for giving me all the guidance throughout the two
semesters. Special thanks goes to all Electronics lecturers for the constant
reminders and helped me a lot in giving the ideas of this project.
Nevertheless,
my high appreciation dedicated to my family, British-Malaysian Institute
technical assistant Mr Faizal, Electronics lecturers Madam Siti Noor Hajar
binti Hasan Basri and Dr. Zainudin Kornain that have shown their supports and
also my beloved coursemates Ameerul Syafiq, Mohd Firdaus,Tengku Muhammad Akram b. Tengku Abd
Rashid, Che Farhan, Muhammad Zahir, Mohd Amsyar b. Aminuddin, Ali Ridha b.
Lutpi and Muhammad Fadhil Bin Zainuddin who helped me a lot in finishing this
Final Year Project.
Lastly, I wish the best for all who have worked tirelessly
to help me in this project. If without the help of any party, this project
could not proceed because my knowledge in this area is very small.
ABSTRACT
This
project title is Development of Universal Asynchronous Receiver / Transmitter
Interface Using Verilog HDL. A UART or Universal Asynchronous Receiver-Transmitter
is a piece of computer hardware that translates between parallel bits of data
and serial bits. A UART is usually an integrated circuit used for serial
communications over a computer or peripheral device serial port. UARTs are now
built into some of the microcontrollers for example, PIC16F877A.
The word asynchronous indicates that UARTs recover character timing information from the data stream, using designated start and stop bits to indicate the framing of each character. In synchronous transmission, the clock data is recovered separately from the data stream and no start/stop bits are used. This improves the efficiency of transmission on suitable channels; more of the bits sent are data. An asynchronous transmission sends nothing over the interconnection when the transmitting device has nothing to send; but a synchronous interface must send pad characters to maintain synchronism between the receiver and transmitter. The usual filler is the ASCII "SYN" character. This may be done automatically by the transmitting.
The word asynchronous indicates that UARTs recover character timing information from the data stream, using designated start and stop bits to indicate the framing of each character. In synchronous transmission, the clock data is recovered separately from the data stream and no start/stop bits are used. This improves the efficiency of transmission on suitable channels; more of the bits sent are data. An asynchronous transmission sends nothing over the interconnection when the transmitting device has nothing to send; but a synchronous interface must send pad characters to maintain synchronism between the receiver and transmitter. The usual filler is the ASCII "SYN" character. This may be done automatically by the transmitting.
TABLE OF CONTENTS
CHAPTER TITLE PAGE
DECLARATION
ii
APPROVAL iii
ACKNOWLEDGEMENT iv
ABSTRACT v
TABLE OF CONTENTS vi
LIST OF FIGURES ix
1 INTRODUCTION 1
1.1
Project Background 3
1.2 Project
Statement 4
1.2.1 Receiver
5
1.2.2 Transmitter 6
1.3 Problem
Statement
7
1.4 Objectives
8
1.5 Scope
of Project/ Limitation 9
1.5.1 Large Voltage Swings 9
1.5.2 Single-ended Signaling 10
1.5.3 Propogation Delay 10
1.5.4 Multi-drop
Connection 11
1.5.5 Asymmetrical definitions 11
1.6 Summary
of Chapter 12
2 LITERATURE
REVIEW 13
2.1 History 13
2.1.1 RS232
port 14
2.1.2 Altera
DE2 board 15
2.1.3 FPGA 16
2.1.4 ASIC 16
2.1.5 Verilog
HDL 17
2.2 Previous
Work 18
2.2.1 Embedded
System 18
2.2.2 Development
Board:Wireless Transceiver 20
2.2.3 Wireless
Temperature and Humadity Sensor 22
2.3 Present
Work 24
2.4 Asynchronous Serial Transmission 24
2.5 Review History 26
2.6 Summary 27
3 METHODOLOGY 28
3.1
Introduction 28
3.2 Block
Diagram 29
3.2.1 Explanation 29
3.3
Hardware & Development 30
3.3.1 The
Electronics Part 30
3.3.1.1 Max 232 Interfacing Circuit 30
3.3.1.2 RS232 port 32
3.3.1.3 Altera DE2 board 34
3.4
Software & Development 36
3.4.1 Verilog HDL software 36
3.4.2 Data
Encoding 53
3.4.3 Receiver 53
3.4.4 Transmitter 59
3.5
Summary
65
4 RESULT
AND ANALYSIS 66
4.1 Introduction 66
4.1.1 The Electronic Circuit Analysis &
Theory 67
4.2 The
Expected Output 68
4.3 The
Expected Result 71
4.4 Summary
of Chapter 76
5 CONCLUSION
AND RECOMMENDATION 77
5.1 Conclusion 77
5.2 Recommendation 79
6 REFERENCES 80
LIST OF FIGURES
FIGURE NO. TITLE PAGE
1 Wireless Transceiver 20
2 Wireless
Temperature and Humadity Sensor 22
3 System block
diagram 29
4 Max 232
Schematic Diagram 30
5 Max 232 chip 31
6 Max 232
functional diagram
31
7 RS232 Pin
Configurations 32
8 DE2 Development and Educational Board 34
9 Verilog HDL Lecture Note 36
10 Verilog HDL Software Interface 53
11 Electronic circuit of Universal Asynchronous
Receiver /
Transmitter using PIC 16F877A 68
12 RTL Viewer
69
13 State Machine
Viewer 69
14 UART Verilog
Code
70
15 Successful
compiling using MPLAB IDE software 71
16
Keypad compiling using MPLAB IDE
software 72
17 RS 232 compiling
using MPLAB IDE software 73
18 UART main
compiling using MPLAB IDE software 74
19 UART compiling using
MPLAB IDE software 75
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