PROGRESS 6: OBJECTIVES & BENEFITS / CONTRIBUTION

OBJECTIVE

The objectives of the proposed project, Development of Universal Asynchronous Receiver/ Transmitter are;

1. To design a serial asynchronous receiver and transmitter communication with standard I/O serial devices.

2. To design a UART that can be prototyping Altera DE2, then testing and debugging the prototype in system.

3. To analyze the features of UART technology and make comparison with other existing UART technology.

4. To implement the asynchronous receiver-transmitter in Altera DE2 board to achieve fast prototyping and design verification.

5. To learn and expertise using Verilog HDL and Altera DE2.

BENEFITS / CONTRIBUTION

Based on the objectives above this device would provide some original contribution in the Development of UART interface using Verilog HDL. The main original contributions of this project can be stated briefly as follow:

Benefit/contribution for using Verilog HDL:

1. Compiled code speed and ability to create distributable EXEs and DLLs.

2. Powerful, flexible, and scalable design (open, connects to external libraries and third-party tools)

3. Easy to learn, use, maintain, and upgrade (intuitive graphical programming, using graphical constructs)

4. One tool for design, prototyping and deployment

5. Multidisciplinary use (same easy graphical programming language for different applications and domain experts in different disciplines in science and engineering)

6. Tight software-hardware integration (supports wide variety of data acquisition and embedded control devices)

7. Multicore-ready design (intrinsic parallelism) and support for different hardware acceleration technologies (DSPs, FPGAs, and GPUs as coprocessors)

8. Multiplatform (Windows, Mac OS, Linux, RTOSs)

Benefit/contribution of using Universal Asynchronous Receiver/ Transmitter:

1.       A UART  may be used  when:

     i. High speed is not required

    ii. An inexpensive communication link between two devices is required

2.       UART communication is very cheap

3.       Single wire for each direction (plus ground wire)

4.       Asynchronous because no clock signal is transmitted

5.       Relatively simple hardware